Computer operating systems use virtual memory techniques to permit application programs to address a contiguous working memory space, even when the corresponding physical (machine) memory space is fragmented and may overflow to disk storage. The virtual memory address space is typically divided into pages, and the computer memory management unit (MMU) uses page tables to translate the virtual addresses of the application program into physical addresses. The virtual address range may exceed the amount of actual physical memory, in which case disk storage space is used to save (“swap out”) virtual memory pages that are not currently active. When an application attempts to access a virtual address that is absent from the physical memory, the MMU raises a page fault exception (commonly referred to simply as a “page fault”), which causes the operating system to swap the required page back from the disk into the memory. Other uses of page faults in memory management are also known in the art.
I/O devices usually use physical memory addresses in order to access host memory, but some virtual memory addressing techniques for I/O have been developed. For example, the PCI-SIG organization (Beaverton, Oreg.) has developed a set of I/O Virtualization (IOV) specifications. The PCI-SIG Address Translation Services (ATS) specifications, including ATS 1.0 and 1.1, provide a set of transactions for PCI Express® (PCIe) components to exchange and use translated addresses in support of native I/O Virtualization. ATS includes a Page Request Interface (PRI) extension, which can be used by I/O devices to request the services of the host memory manager, for instance in resolving pages of virtual memory that the I/O device (or an associated IOMMU) was unable to translate into corresponding physical pages.
Some virtual memory addressing techniques for I/O have been described in the patent literature. For example, U.S. Pat. No. 6,321,276 describes methods and systems for processing input/output requests including virtual memory addresses. A “recoverable I/O request processor” translates virtual memory addresses to physical memory addresses utilizing translation tables local to an I/O device. If a local translation fails, the I/O request processor requests virtual address mapping information from the operating system.
U.S. Patent Application Publication 2004/0221128, whose disclosure is incorporated herein by reference, describes virtual-to-physical memory mapping in network interfaces. A plurality of processing nodes in a network have respective addressable memories and respective network interfaces. Each network interface includes a memory management unit with at least one mapping table for mapping virtual addresses to the physical addresses of the addressable memory of the respective processing node.
U.S. Pat. No. 8,255,475, whose disclosure is incorporated herein by reference, describes an I/O device that includes a host interface, for connection to a host device having a memory, and a network interface, which is configured to receive, over a network, data packets associated with I/O operations directed to specified virtual addresses in the memory. Packet processing hardware is configured to translate the virtual addresses into physical addresses and to perform the I/O operations using the physical addresses. Upon an occurrence of a page fault in translating one of the virtual addresses, the I/O device transmits a response packet over the network to a source of the data packets so as to cause the source to refrain from transmitting further data packets while the page fault is serviced.
U.S. Pat. No. 8,914,458, whose disclosure is incorporated herein by reference, describes devices and methods for I/O memory management that are compatible with and facilitate the use of virtual memory. In some embodiments, an I/O device, such as a NIC, is configured to send and receive, over network transport connections, data packets associated with I/O operations that are directed to specified virtual addresses in a host memory. Packet processing hardware in the I/O device translates the virtual addresses into physical addresses and carries out the I/O operations using the physical addresses. When a page fault occurs, the I/O device may interact with the host operating system (OS), and possibly with user application programs running on the host, in order to minimize delay in handling the present page fault and/or avoid page faults in subsequent I/O operations.